Hardware technique eliminating certain false data dependencies.

ARM Scalable Vector Extension hardware.

Cache allowing a block to occupy any cache location.

Processor hardware performing operations.

Hardware accelerating cryptographic operations.

Access where requested data is absent from the cache.

Arithmetic Logic Unit performing integer arithmetic and logic.

Hardware accelerating AES encryption and decryption.

Fixed-size unit of data transferred between cache levels.

Access where requested data is found in the cache.