Hardware managing processor-to-memory communication.
Hardware managing processor-to-memory communication.
Processor and memory region within a NUMA system.
Hardware consistency of shared memory views.
Mechanism keeping multiple processor caches consistent.
Interconnect maintaining consistent memory views among processors.
Connection transferring data between semiconductor dies.
High-speed internal or external processor interconnect.
Intel connection between processor/chipset components.
High-speed interconnect technology used in earlier AMD systems.
Everything is a system, and every system contains systerms.