Technique distributing accesses across multiple memory banks.

Fifth-generation DDR memory technology.

Fast memory commonly used for CPU caches.

Internal NAND region containing multiple blocks.

Process that restores charge in DRAM cells.

Low-power DDR memory technology for mobile devices.

Dynamic memory requiring periodic refresh.

Signal historically used to select a DRAM row.

Second-generation low-power DDR memory.

Synchronous dynamic random-access memory.