NAND flash with vertically stacked memory cells.

Physical-layer circuitry connecting a controller to memory.

PCB layer distributing memory power.

Rambus dynamic random-access memory.

Vertically stacked NAND flash architecture.

Hardware calibrating high-speed memory interfaces.

PCB layer providing memory grounding.

Extended-data-out dynamic memory.

Hardware managing flash-memory operations.

Hardware providing signal termination for memory buses.