hardware system

Time required to begin receiving requested memory data.

Amount of data memory can transfer per unit time.

Rate at which memory transfers or clocks data.

Delays controlling memory access operations.

Minimum active time of a DRAM row.

DRAM timing required to precharge a row.

DRAM timing between row activation and column access.

Delay between a memory read command and available data.

Delay between selecting a DRAM row and column.

Signal historically used to select a DRAM column.