Hardware buffering memory signals.

Memory controller integrated into a processor.

Chip managing system-memory communication.

Stack of NAND memory dies in a package.

Layer mapping logical addresses to physical flash locations.

System managing defective flash-memory blocks.

Hardware or firmware subsystem reclaiming flash storage blocks.

Hardware distributing flash writes across memory cells.

Hardware implementing low-density parity-check correction.

Hardware generating or checking error-correction codes.