Very small cache close to processor execution hardware.

First-level processor cache.

Second-level processor cache.

Larger shared processor cache.

Cache storing recently evicted cache lines.

Hardware managing processor cache operations.

Memory storing cache-line identification information.

Memory storing actual cache data.

Translation lookaside buffer for virtual-address translation.

Memory management unit.

Hardware translating device memory addresses.

Hardware enforcing memory-access permissions.

Hardware locating virtual-memory page mappings.

Independent path between memory controller and memory.

Group of memory chips accessed together.

Independently accessible section of memory.

Individual semiconductor die containing memory circuits.

Physical package containing memory dies.

PCB carrying multiple memory chips.

Dual inline memory module.

Compact memory module commonly used in laptops.

Registered dual inline memory module.

Load-reduced dual inline memory module.

Unbuffered dual inline memory module.

Memory module supporting error-correcting code.

Memory capable of detecting or correcting certain errors.

Double-data-rate synchronous memory.

Second-generation DDR memory.

Third-generation DDR memory.

Fourth-generation DDR memory.

Fifth-generation DDR memory.

Low-power DDR memory family.

Fourth-generation low-power DDR memory.

Fifth-generation low-power DDR memory.

Static random-access memory.

Dynamic random-access memory.

Synchronous dynamic random-access memory.