Fixed-size unit of data transferred between cache levels.

Number of locations where a cache block may be stored.

Access where requested data is absent from the cache.

Access where requested data is found in the cache.

Loading predicted data into a cache before it is requested.

Hardware accelerating cryptographic operations.

Pipeline uncertainty caused by branching instructions.

Independent processing unit within a processor.

Logical execution context supported by a processor.

Physical package containing one or more processor dies.

Motherboard socket receiving a compatible processor.

Physical components that make up a computer system.