hardware system

Hardware predicting the outcome of program branches.

Individual step in instruction processing.

Processor technique dividing instruction execution into stages.

Hardware managing cache operations.

Event where requested data is absent from cache.

Successful retrieval of requested data from cache.

Small block of data transferred between cache and memory.

Additional cache level found in some processor designs.

Larger cache commonly shared among CPU cores.

CPU cache larger than L1 but generally slower.